Generally, a bump may be formed on a semiconductor die in order to connect the semiconductor die to other dies or devices. These bumps are normally connected to the semiconductor die by layers of conductive material collectively known as under bump metallization (UBM) that extend through a first passivation layer. The UBM provides for a connection between the bump and a contact pad in order to electrically connect the bump to the various metal layers formed within the semiconductor die. The various metal layers are preferably separated by dielectric layers and at least a second passivation layer, which may include low-k or even extremely low-k dielectric materials.
This arrangement, however, causes materials with different coefficients of thermal expansions (CTE) to be deposited on each other. As such, when the temperature of these materials is raised, for example during a flip chip bond reflow process, the different materials will expand to different lengths, causing peeling stress and shear stress to build up along the interfaces. These stresses could easily lead to delamination, such as delamination between the UBM and the contact pad, which would immediately cause problems in yield and overall productivity. This problem is especially true when low-k and extremely low-k dielectrics are utilized for one or more of the dielectric layers.
As such, what is needed is a low cost method of solving this stress-induced delamination problem caused by CTE mismatches of the materials used.